The processing element of the parallel architecture is an 8-bit data comparator (Two cell comparator). A parallel architecture is developed for Vasanth sorting with 25 comparators. Vasanth sorting requires only 25 comparators to sort 9 elements of the window. In this work, a novel 2D sorting technique referred to as Vasanth sorting is proposed for a fixed 3 × 3 window. The basic operation in salt and pepper noise removal is rank ordering. An efficient VLSI architecture for minimized sorting network (Vasanth sorting) in rank ordering application to remove salt and pepper noise is proposed.
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